Typically, a radio frequency (RF) amplifier accepts a varying input signal and produces a varying output signal, but with a larger amplitude. In one example, the output signal can be an RF signal that is fed to an antennae for broadcast to a remote receiver. The RF amplifier can use solid state devices such as field effect transistors (FETs) for boosting input signals of low power applications.
One RF amplifier design employs a single FET to provide a stable output signal that is free from oscillation. However, the single FET may not provide enough power. Another amplifier design employs a parallel set of two or more FETs to increase the power rating, or provide the same power with less effort than the single FET. However, the parallel FETs are susceptible to undesirable oscillations that are sometimes called “parallel FET oscillation” or “odd mode oscillation.” The oscillation can be caused by inductance from downbond or bondwires. Moreover, in a cascaded power amplifier design, which includes multiple stages of amplification, the oscillation is amplified as well.
The oscillation of RF amplifiers is problematic when used along side sensitive components. For example, many system on a chip (SoC) configurations, such as those used for wireless local access networks (WLANs), include digital components. Oscillations from the RF amplifier reduces stability during operations.
Current approaches to reducing oscillation can attenuate the signal. For example, the gain of an amplifier can be reduced to reduce the oscillation fed to a subsequent amplifier stage. In another example, a matching resistive network can be provided to attenuate the gate currents. Problematically, both examples reduce the total output of the RF amplifier.
Accordingly, what is desired is an RF amplifier that cancels out oscillation between amplification stages without reducing the output power. The present invention addresses such a need.